Generally, a power switch provided in a semiconductor integrated circuit is constituted by a plurality of metal-oxide-semiconductor field-effect-transistors (MOSFETs) (hereinafter referred to as “transistors”) connected in parallel.
Conventionally, when a test is performed on the transistors constituting the power switch, a fault is indirectly detected by performing a pass/fail determination of a scan test and a memory test based on operation specifications of a device. However, in such a technique, it is difficult to deterministically test the individual transistors constituting the power switch, and it is difficult to specify a transistor having a fault.